Does FPGA run when Crio boots to Saft Mode?

I'm wondering about the status of the FPGA operation when the controller boots to "Safe Mode"?

It would be nice if the FPGA would run without the RT system.  My 9081 runs the Pharlap system and I have crashes when cause the system to go to safe mode. 

I have written my FPGA code to recover from a reboot into a mode that should be 'safe' with respect to my hardware and system. 

Can somebody enlighten me on how the Crio handles this? 

Thanks,

Jim