I've always wondered.....
LabVIEW ships with IPCores for BRAM instances and FIFO instances which I have never been able to get running.
I just revert to using the LV-intern BRAM and FIFO Primitives. But once in a while, I miss the full functionality of the Xilinx primitives. Things like asynchronous dual-clock BRAM and asynchronous dual clock FIFOs.
Has anyone ever been able to successfully use such primitives in LabVIEW? If so, could someone give me an idea how to accomplish that? I have some design decisions which are kind of awkward which could be solved very elegantly be simply having access to asynchronous read and write ports for dual-clock BRAM.
Shane