Two ways of partition a block RAM of a FPGA in a PXi-7833R
1. declare one block of block RAM, and partition it into different segment based on address. I will have to turn on arbitration, since the memory maybe read in parallel.
2. declare multiple blocks of blck RAM and turn off abitraion.
Which is more speed or resoruces efficient? I am thinking that option 2 will be more resources efficient, since no arbitration circutis need to be added. However, I am not sure is there any addition overhead associated with declaring more memory blocks.
I will play with this a little, but want to ping the forum to see is there a better idea out there.