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High speed and frequently communication between 2 PXI/PXIe chassis

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Hi,

I am doing a project which required high speed data commnication between 2 chassis. 24 Double digital numbers in a loop rate 10K. The first thing come to my mind is using reflective memory. But the result is not good enough. The data transfer tooks 80% of time in the 10K loop, Then to avoid loop late, I could not do any thing else in this loop.

 

Is there any option else? Maybe using digital I/O in FPGA card?

 

Thanks in advance!


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