I developed an application running on a realtime desktop pc, now I need to port the application to a small cRio 9074. On the FPGA part I want to run some array calculations. After adapting the vi to FPGA restrictions (fxp...) I had no sucess compiling it. Both trials on an Intel i7 with 8Gb RAM stopped after 2-3 hours, first error was a process blocked and needed by the compiler, on the second run it reported not enough memory.
I want to test the cloud compile option to see if the vi compiles there. Apart from this Im afraid Im doing something stupid in my code which simply is too much for the FPGA. Im not allowed to post my code here so Ill describe what it does.
Ive got two 1D arrays of the same lenghts (~500 elements each). A hand full of for-loops performs operations on them. Some depend on the previous iteration, others dont. Some of the later loops could run in parallel. In the end I receive some scalar values.
Is this concept feasible in the FPGA or is this the cause of impossible compiling? Does the compiler try to implement a few thousand parallel loop executions? How do I find out whats wrong?