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FPGA Compile - Order of processing of Diagrams

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Recently, my FPGA compiles require quite a long time to pass through stage 2 of the "Generating Itnermediate Files" step of the compilation. It seems to require a long time for a couple of the files.  Index 3145 for example..... Is htere anywhere I can find out which file this corresponds to, so that I can see if there's anything special about this file (assuming it's a LV VI) so that I can speed things up. I'm talking about 3-4 minutes pause at multiple stages of the process. It's really slowing down my FPGA compiles (because of course the entire IDE is blocked during this time).


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