Hi all,
When I'm creating a Xilinx FIR filter for my FPGA in LabVIEW I can configure it with the Xilinx FIR Compiler Node, but this thing creates very long path names for my files, they are so long my git server doesn't allow it anymore. I'm already choosing very short names for the filters and the path is almost at the root of my disk.
When I open the "Configure Xilinx IP" It will open the FIR Compiler, and here it shows the new by labview generated compopnent name, like in the image below. Is there a way to decrease the size of those random characters?
I've tried not adding these intermediate files to my repository, but when I try to open the project from another machine I have to reconfigure all the FIR filters. This is a real pain because these filters are not made by me.
Does anyone know how to change the long file names, or have a different solution for me?